Memory devices are typically provided as internal storage in computers. In general, memory devices contain an array of memory cells for storing data, and row and column decoder circuits that are peripheral and coupled to the array of memory cells for accessing the memory cells in response to an external address.
One type of memory is a non-volatile memory known as flash memory. This is a type EEPROM (Electrically-Erasable Programmable Read-Only Memory) that can be erased and reprogrammed in blocks. Many modern personal computers have their BIOS stored on a flash memory chip so that it can be easily updated. Such a BIOS is sometimes called a flash BIOS. Flash memory is also popular in wireless electronic devices because it enables the manufacturer to support new communication protocols as they become standardized and to provide the ability to remotely upgrade the devices for enhanced features.
A typical flash memory comprises a memory array that includes a large number of memory cells arranged in row and column fashion. Each of the memory cells includes a programmable field-effect transistor having a programmable charge trapping region capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed on an individual basis by charging the charge trapping region of individual transistors. The charge can be removed from the charge trapping regions by a block erase operation. The data in a cell is determined by the presence or absence of the charge within the charge trapping region.
Memory devices are typically formed on semiconductor substrates. The array of memory cells and peripheral circuitry devices are disposed on the substrate. Adjacent devices or rows of devices are electrically isolated by trenches formed within the substrate which are subsequently filled with dielectric material, and is commonly referred to as trench isolation. The trench isolation provides voltage isolation by acting to prevent extraneous current flow through the substrate between certain memory cells within the array and between certain adjacent devices in the periphery. A continuing goal in integrated circuitry fabrication is to decrease the size of individual electronic components and place them ever closer together. Such has resulted in forming deeper and narrower isolation trenches, particularly in memory arrays versus within circuitry area peripheral to the memory arrays. Challenges exist in filling these trenches with dielectric material in forming suitably dense trench isolation.
One example trench isolation material is silicon dioxide. Such may be deposited by chemical vapor deposition, which may or may not be plasma enhanced, or from spin-on-dielectric material processing. Spin-on-dielectrics are conventionally densified in steam at temperatures greater than 500° C. This temperature can cause adverse properties to be introduced into tunnel dielectric material of the flash memory transistor, which degrades memory cell reliability. Line-bending has been seen to occur of the tunnel dielectric and charge trapping material while filling isolation trenches when chemical vapor depositing using TEOS with O3.